Speed (mhz) != Performance

[Tab.]

It appears as if AMD's 64bit processor has a feature, which when supported by the CPU can be used to disallow the execution of unauthorized code. Obviously, this is being advertised as making your PC more secure, but on the downside you're loosing control and loss of control always comes down to DRM measures.

You evil bastard.

[Nemoxs]

Intel sucks... My grandmother bought a new 3.06 P4 straight from the manufactor, and it BLOWS, I've tried everything under the sun to get it to work right and it just doesnt work, every intel I've had blew.

Thats why I use AMD (I sound like a fucking commercial), I need a new board (2600?), but I'm using my 550 k6'2 board right now, and it still runs like the first day i got it, I've been making videos for 3 years on this baby and it hasnt killed me yet.

Moral of the story... Don't trust evil corperations (that have contracts with microsoft).

[dj-ohki]

Difference between Athlon 64 3200 and FX? The major thing is probably the cache difference. I believe the FX has a 1 MB L2 cache and the 64 3200+ has a 256k or 512k. I think the FX also has more Hypertransport links.

the only difference that i can see from AMD's whitepapers, is that the FX has a memory bus that is twice as wide as the stock 64. both of them have a single HT link ( no glueless NUMA love), run at the same FSB speed, and both have 1 MB of l2 cache.

cant find any technical whitepapers on the optierions, but IIRC, they have 2MB l2, and 3 HT links (8 way glueless NUMA love)

[bum]

i reckon that the Mhz rating sistem is full of crap too, and athlons performance rating system isnt too much beter. i mean, an athlonxp 2200 is about as fast as a p4 2.4 (but not the C variant that has hyperthreading) but an athlonxp 3200 can even compete with a p4 3.06 . i think that their should be a more universal (fairer, more truthful) way of rating cpu's. how about mips (million instructions per second) ?

[dwchang]

Difference between Athlon 64 3200 and FX? The major thing is probably the cache difference. I believe the FX has a 1 MB L2 cache and the 64 3200+ has a 256k or 512k. I think the FX also has more Hypertransport links.

the only difference that i can see from AMD's whitepapers, is that the FX has a memory bus that is twice as wide as the stock 64. both of them have a single HT link ( no glueless NUMA love), run at the same FSB speed, and both have 1 MB of l2 cache.

cant find any technical whitepapers on the optierions, but IIRC, they have 2MB l2, and 3 HT links (8 way glueless NUMA love)

Wow 0 for 3 in the three posts i've replied to.

The Athlon 64 has a 256k L2 cache. I can guarantee you on that. You don't need a whitepaper for that. Just go to any major technical website or vendor.

The Athlon FX has a 1MB L2 cache. Although you are right about the HT links. It only has one while the Opteron has 3. Then again, why would a consumer need more than one 1 HT link which runs at over 4 GB/s xfer on the north-bridge.

2 MB cache? Are you out of your mind. That would make the die nearly 60% larger than it already it is. Who do you think we are? Intel? People who just throw bigger caches at a performance problem (*cough* Pentium 4 Extreme Edition *cough*).

[dj-ohki]

Wow 0 for 3 in the three posts i've replied to.

The Athlon 64 has a 256k L2 cache. I can guarantee you on that. You don't need a whitepaper for that. Just go to any major technical website or vendor.

referenced from http://www.amd.com/us-en/assets/content ... agram3.gif

128k L1 (64 data, 64 instruction), '1152KB effective cache' (which is where i got the 1mb cache from)

the athlon fx has its own reference page, with http://www.amd.com/us-en/assets/content ... agram3.gif

note, 128 L1, 1152KB effective. thus, 1meg on each.

The Athlon FX has a 1MB L2 cache. Although you are right about the HT links. It only has one while the Opteron has 3. Then again, why would a consumer need more than one 1 HT link which runs at over 4 GB/s xfer on the north-bridge.

6.4Gb/sec, which is 0.8GB/sec. and if the FX is posed to be a prosumer cpu, i would have expected it to have at least 2 HT links (2 way glueless SMP).

2 MB cache? Are you out of your mind. That would make the die nearly 60% larger than it already it is. Who do you think we are? Intel? People who just throw bigger caches at a performance problem (*cough* Pentium 4 Extreme Edition *cough*).

beacuse the opterion is posed to strike the Xeons, though the 2MB/l2 is prolly from a very old tech spec. but, i would have liked to see a 2MB or even a 8 or 16 MB version of the opertion or 64FX, being memory starved as they are. or perhaps even a 256, 512 or even 1024 bit memory bus when multiple DDR slots are occupided (like nvidia's memory crossbar in the FX video cards). die size be dammed, a 1024bit DDR3200 memory controller in a opeterion core with 8MB L2 would FLY.

[dwchang]

Wow 0 for 3 in the three posts i've replied to.

The Athlon 64 has a 256k L2 cache. I can guarantee you on that. You don't need a whitepaper for that. Just go to any major technical website or vendor.

referenced from http://www.amd.com/us-en/assets/content ... agram3.gif

128k L1 (64 data, 64 instruction), '1152KB effective cache' (which is where i got the 1mb cache from)

the athlon fx has its own reference page, with http://www.amd.com/us-en/assets/content ... agram3.gif

note, 128 L1, 1152KB effective. thus, 1meg on each.

uhm...I don't mean to sound arrogant, but I don't blame you since you wouldn't know this.

Nobody in industry talks about "total cache" (which includes the L3). When you talk cache, you talk about the L2 and in both cases, my statements are still correct. You'll notice I explicitely said L2.

FX = 1 MB L2
Athlon 64 = 256k L2

The Athlon FX has a 1MB L2 cache. Although you are right about the HT links. It only has one while the Opteron has 3. Then again, why would a consumer need more than one 1 HT link which runs at over 4 GB/s xfer on the north-bridge.

6.4Gb/sec, which is 0.8GB/sec. and if the FX is posed to be a prosumer cpu, i would have expected it to have at least 2 HT links (2 way glueless SMP).

Again, the FX still has only one HT link (it even says on that site "A Hypertransport...). I believe the memory interface is 128 bit though.

2 MB cache? Are you out of your mind. That would make the die nearly 60% larger than it already it is. Who do you think we are? Intel? People who just throw bigger caches at a performance problem (*cough* Pentium 4 Extreme Edition *cough*).

beacuse the opterion is posed to strike the Xeons, though the 2MB/l2 is prolly from a very old tech spec. but, i would have liked to see a 2MB or even a 8 or 16 MB version of the opertion or 64FX, being memory starved as they are. or perhaps even a 256, 512 or even 1024 bit memory bus when multiple DDR slots are occupided (like nvidia's memory crossbar in the FX video cards). die size be dammed, a 1024bit DDR3200 memory controller in a opeterion core with 8MB L2 would FLY.

Uhm...Memory Starved? Do you understand Computer Architecture? 1 MB of L2 cache is A LOT...well when you consider die-size.

1) L2 increasing has diminishing returns. Sure if you increase it, you get performance, but at a certain point, it's not worth it. The returns just aren't that good.

2) Increasing the L2 will increase the die size. Do you really wanna have a chip *that* big? Oh and go tell the Motherboard manufacturers that they gotta go design *another* motherboard. Yeah right.

3) Increasing L2 size will lead to less yield. L2's aren't that easy to fabricate (or rather large ones). As I said with diminishing returns in performance, you will also get diminishing returns in yield since you won't get that many chips out. Go make an 8 MB L2 cache and see just how many of these (giant) processors will yield at final sort. I doubt even one would out of a possible 250+.

Again, increasing the L2 is just an easy way to increase performance and everyone knows it's the lazy approach. It's *much* better to just make optimizations to your pipeline and various other components. It A) won't increase die-size, B) won't destroy yields and C) will lead to much better performance increases.

[dj-ohki]

uhm...I don't mean to sound arrogant, but I don't blame you since you wouldn't know this.

Nobody in industry talks about "total cache" (which includes the L3). When you talk cache, you talk about the L2 and in both cases, my statements are still correct. You'll notice I explicitely said L2.

just going from whats on your guy's site. im not trying to arugue, im just pointing out where i got that info, since you corrected me, i stand corrected

FX = 1 MB L2
Athlon 64 = 256k L2

so you're saying the ath64 has 768 kb of l3 and the FX has 0 l3? FWIT, IIRC, there is 0 off chip cache in any 64 bit athlon varient.

The Athlon FX has a 1MB L2 cache. Although you are right about the HT links. It only has one while the Opteron has 3. Then again, why would a consumer need more than one 1 HT link which runs at over 4 GB/s xfer on the north-bridge.

6.4Gb/sec, which is 0.8GB/sec. and if the FX is posed to be a prosumer cpu, i would have expected it to have at least 2 HT links (2 way glueless SMP).

Again, the FX still has only one HT link (it even says on that site "A Hypertransport...). I believe the memory interface is 128 bit though.

yup, i know it only has 1 HT link, im waxing retorical on the idea of having 2 HT links would have been really nice for a prosumer chip, due to the fact it would allow for 2 way glueless SMP.

2 MB cache? Are you out of your mind. That would make the die nearly 60% larger than it already it is. Who do you think we are? Intel? People who just throw bigger caches at a performance problem (*cough* Pentium 4 Extreme Edition *cough*).

beacuse the opterion is posed to strike the Xeons, though the 2MB/l2 is prolly from a very old tech spec. but, i would have liked to see a 2MB or even a 8 or 16 MB version of the opertion or 64FX, being memory starved as they are. or perhaps even a 256, 512 or even 1024 bit memory bus when multiple DDR slots are occupided (like nvidia's memory crossbar in the FX video cards). die size be dammed, a 1024bit DDR3200 memory controller in a opeterion core with 8MB L2 would FLY.

Uhm...Memory Starved? Do you understand Computer Architecture? 1 MB of L2 cache is A LOT...well when you consider die-size.

1) L2 increasing has diminishing returns. Sure if you increase it, you get performance, but at a certain point, it's not worth it. The returns just aren't that good.

2) Increasing the L2 will increase the die size. Do you really wanna have a chip *that* big? Oh and go tell the Motherboard manufacturers that they gotta go design *another* motherboard. Yeah right.

3) Increasing L2 size will lead to less yield. L2's aren't that easy to fabricate (or rather large ones). As I said with diminishing returns in performance, you will also get diminishing returns in yield since you won't get that many chips out. Go make an 8 MB L2 cache and see just how many of these (giant) processors will yield at final sort. I doubt even one would out of a possible 250+.

Again, increasing the L2 is just an easy way to increase performance and everyone knows it's the lazy approach. It's *much* better to just make optimizations to your pipeline and various other components. It A) won't increase die-size, B) won't destroy yields and C) will lead to much better performance increases.

again, waxing retorical, based on the fact that the power3 has 8 meg, the power 4 has 1.4 meg, and the RS64-3 has 16 meg. im not arguing here.

[dwchang]

so you're saying the ath64 has 768 kb of l3 and the FX has 0 l3? FWIT, IIRC, there is 0 off chip cache in any 64 bit athlon varient.

Actually both don't have an L3 period. It's just as I stated with the FX at 1 MB L2 and 64 at 256 KB. Both have the same L1.

yup, i know it only has 1 HT link, im waxing retorical on the idea of having 2 HT links would have been really nice for a prosumer chip, due to the fact it would allow for 2 way glueless SMP.

True. That would definitely help, but I imagine it would've been quite a bit more difficult to get in there.

again, waxing retorical, based on the fact that the power3 has 8 meg, the power 4 has 1.4 meg, and the RS64-3 has 16 meg. im not arguing here.

Well you're right *but* the big difference is that these are high-end server chips. We're talking (or so I thought) about consumer desktop chips and the L2 wouldn't need to be that big for consumer based applications and more importantly, they wouldn't want to pay that much for them. As I said earlier, it's hard to yield with a larger cache and thus the price also goes up (to make up for that cost).

[dj-ohki]

so you're saying the ath64 has 768 kb of l3 and the FX has 0 l3? FWIT, IIRC, there is 0 off chip cache in any 64 bit athlon varient.

Actually both don't have an L3 period. It's just as I stated with the FX at 1 MB L2 and 64 at 256 KB. Both have the same L1.

then the over 1 meg 'effective' cache listing on their site is pretty much a load of crap. or a really streched spin.

yup, i know it only has 1 HT link, im waxing retorical on the idea of having 2 HT links would have been really nice for a prosumer chip, due to the fact it would allow for 2 way glueless SMP.

True. That would definitely help, but I imagine it would've been quite a bit more difficult to get in there.

true, but since ath64 is NUMA and not SMP, you wouldnt have to worry about cache coherency and all that rot. *shrug* oh well, there's always operterion.

again, waxing retorical, based on the fact that the power3 has 8 meg, the power 4 has 1.4 meg, and the RS64-3 has 16 meg. im not arguing here.

Well you're right *but* the big difference is that these are high-end server chips. We're talking (or so I thought) about consumer desktop chips and the L2 wouldn't need to be that big for consumer based applications and more importantly, they wouldn't want to pay that much for them. As I said earlier, it's hard to yield with a larger cache and thus the price also goes up (to make up for that cost).

i though we were having 2 distinct converstations, one about ath64/ath64fx (consumer/prosumer) and one about the opterion, which is amd's forray into the high end server market. 64 bit NUMA architecture with 8 way glueless MP, thats pretty high end.

and no, consumer level programs have no need for 8 meg l2s. it would be nice to be able to fit an entire filter chain + video frame in cache, but again, not needed.

anyway, im hoping to get a hold of a dualie sledgehammer in the next few months, once the price goes down. either that, or a dualie P4EE (quad dispatch engines is pretty sweet, and before you jump on that, i know it only helps poorly written code) all depends on how things sit in the future.